With dimensional scaling of semiconductor device, threshold voltage decreases with the reduction of channel length, that is to say, short channel effects arise in semiconductor device. Fin Field Effect Transistor, namely, namely, FinFET is developed to face the challenge from semiconductor design and manufacture.
FinFET generally falls into two categories: one is unified-gate-voltage FinFET, that is to say, both gates are controlled by a unified voltage so that the gates are connected in parallel and easy to control; the other is independent-gate-voltage FinFET, that is to say, two gates on both sides of the fin are controlled by different voltage so that channels along both fin sides can be controlled in distinct status through distinct gate voltage. The independent-gate-voltage FinFET has better performance because it can independently control voltages of two gates and channel currents can be turned off more easily.
Two gates on both sides of the fin in an independent-gate-voltage FinFET are with the same dimensions and shape, therefore, two ends of the channel can not be effectively controlled and the device performance may be severely affected.
To resolve the foregoing problems, a method for manufacturing a novel asymmetric FinFET is provided in the present invention. Specifically, the method comprises steps: removing a sacrificial gate stack to form a sacrificial gate vacancy, then covering a photoresist layer on a portion of the semiconductor structure on one side of a fin, and thinning or removing a portion of the spacer which is not covered by the photoresist layer to make the vacancy width in the covered side larger than that in the opposite side, such that a gate stack formed later has a larger width in the covered side larger than that in the opposite side, and the gate stack in the covered side covers the total channel and source/drain extension regions, and voltages on both sides of the channel may be controlled better, control ability of both gates of the independent-gate-voltage FinFET can be effectively enhanced and device performance can be improved.